1. Field of the Invention
The present invention relates to a technology of read operation of a nonvolatile semiconductor memory.
2. Description of the Related Art
Nonvolatile semiconductor memories such as flash memories store data by injecting electrons into the insulators of memory cells for changing threshold voltage. Among the nonvolatile semiconductor memories of this type, ones referred to as virtual ground type have a plurality of nonvolatile memory cells that are connected in series in the direction of word lines. The input/output nodes of adjacent memory cells are connected to common bit lines. Then, the bit lines positioned both sides of a memory cell are connected to a sense amplifier and a voltage source for reading data from the memory cell.
U.S. Pat. No. 5,448,518 has disclosed a technique for reading data simultaneously from two memory cells connected to an identical word line in a nonvolatile semiconductor memory of virtual ground type. In the nonvolatile semiconductor memory of this publication, two column decoders and two selectors are arranged both sides of a memory cell array. The column decoders decode column addresses and activate column-selecting lines according to the decoding results. The selectors have a plurality of column switches connected to the column selecting lines. Then, in read operations, these column decoders and selectors are operated so that the bit lines positioned both sides of two memory cells are respectively connected to sense amplifiers and voltage sources for reading data from the two memory cells. Reading data from two memory cells simultaneously improves data reading rate.
However, in the nonvolatile semiconductor memory of virtual ground type described above, reading out of data from two memory cells simultaneously requires the two column decoders and two selectors. Accordingly, there has been a problem that the control circuit for performing the read operations grows in scale, with an increase in chip size. In particular, the column switches are circuits to be arranged in large numbers within the memory, being required for each of the bit lines. This has a large influence on chip size.
It is an object of the present invention to read data simultaneously from two memory cells in a nonvolatile semiconductor memory without increasing the chip size.
It is another object of the present invention to improve the data reading rate of a nonvolatile semiconductor memory without increasing the chip size.
According to one of the aspects of the nonvolatile semiconductor memory of the present invention, the nonvolatile semiconductor memory has a plurality of nonvolatile memory cells, a word line, a plurality of bit lines, a plurality of switches, four data lines, a first sense amplifier, a second sense amplifier, a switching control circuit, and a switching circuit. The memory cells are connected in series via input/output nodes. The control gates of the memory cells are connected to the word line. The input/output nodes of the memory cells are connected to the bit lines, respectively. Four bit line pairs each consists of two of the bit lines respectively positioned on the outsides of four successive memory cells among the memory cells. The bit line pairs are connected to the four data lines, respectively, via the switches connected to the respective bit lines.
The first sense amplifier and the second sense amplifier amplify data read out from two of the memory cells, respectively. The switching control circuit turns on the switches corresponding to five of the input/output nodes adjacent to each other in a read operation, the five including the input/output nodes of the two memory cells for the data to be read from simultaneously. The switching circuit respectively connects the first and second sense amplifiers to two of the data lines transmitting the data among the data lines connected to the input/output nodes by turning-on of the switches. The switching circuit connects supply nodes of a first voltage and a second voltage to the remaining two of the data lines, respectively.
In this semiconductor memory, the switching control circuit only has to turn on predetermined five switches to read data from two memory cells simultaneously. Therefore, it is possible to read data from two memory cells simultaneously by using the simple switching control circuit without increasing the chip size of the nonvolatile semiconductor memory. In other words, the data reading rate can be improved without increasing the chip size.
According to another aspect of the nonvolatile semiconductor memory of the present invention, the two memory cells for the data to be read from (read memory cells) are adjacent to each other. The switching circuit, in the read operation, connects the first and second sense amplifiers to reading nodes among the input/output nodes, respectively. The reading nodes are on the outsides of the two memory cells. The switching circuit connects the supply node of the first voltage to first nodes among the input/output nodes. The first nodes are on the further outsides of the reading nodes. The switching circuit connects the supply node of the second voltage to a second node among the input/output nodes. The second node is between the two memory cells for the data to be read from.
At this point, the common second node is supplied with the second voltage, whereby memory cell currents occur depending on the memory states of the memory cells. The first and second sense amplifiers amplify the memory cell currents to read the data retained in the two memory cells, respectively. By supplying the first nodes with the first voltage, the difference between the voltages of the first node and the reading node on both sides of the memory cells arranged on the outsides of the read memory cells becomes nearly equal. Therefore, these memory cells can be prevented from causing a memory cell current. As a result, the memory cell currents of the memory cells to be read-operated can be all supplied to the first and second sense amplifiers for reliable data reading.
According to another aspect of the nonvolatile semiconductor memory of the present invention, the two memory cells for the data to be read from (read memory cells) are arranged on both sides of two of the memory cells adjacent to each other. The switching circuit, in the read operation, connects the first and second sense amplifiers to reading nodes among the input/output nodes, respectively. The reading nodes are on the insides of the two memory cells for the data to be read from. The switching circuit connects the supply node of the first voltage to first nodes among the input/output nodes. The first nodes are on the outsides of the two memory cells for the data to be read from. The switching circuit connects the supply node of the second voltage to a second node among the input/output nodes. The second node is on the inside of the reading nodes.
At this point, voltage differences between the first voltage and the voltages supplied from the first and second sense amplifiers to the reading nodes, respectively, cause memory cell currents depending on the memory states of the memory cells. The first and second sense amplifiers amplify the memory cell currents to read the data retained in the two memory cells, respectively. By supplying the innermost second node with the second voltage, the difference between the voltages of the reading node and the second node on both sides of the memory cells arranged on the insides of the read memory cells becomes nearly equal. This can prevent these memory cells from causing a memory cell current. As a result, the memory cell currents of the memory cells to be read-operated can be all supplied to the first and second sense amplifiers for reliable data reading.
According to another aspect of the nonvolatile semiconductor memory of the present invention, the nonvolatile semiconductor memory has a plurality of blocks each including eight of the memory cells, the four bit line pairs, eight of the switches, and the four data lines, and a selector. The selector selectively connects the switching circuit with data lines necessary for the read operation among the data lines of the blocks. Sectioning the plurality of memory cells into a plurality of blocks allows systematic operations of the switching control circuit and the switching circuit. As a result, the switching control circuit and the switching circuit can be configured simply, so that the chip size of the nonvolatile semiconductor memory can be reduced.
According to another aspect of the nonvolatile semiconductor memory of the present invention, the data is simultaneously read from two memory cells that are selected by different addresses and have an identical bit number of input/output data. By using successive addresses for the different addresses, address-decoding logic can be simplified. As a result, the switching control circuit can be configured simply, so that the chip size of the nonvolatile semiconductor memory can be reduced.
According to another aspect of the nonvolatile semiconductor memory of the present invention, the data is simultaneously read from two memory cells that are selected by an identical address and have different bit numbers of input/output data.